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Diffstat (limited to 'arch/mips/ath79')
-rw-r--r--arch/mips/ath79/clock.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/mips/ath79/clock.c b/arch/mips/ath79/clock.c
index fa845953f736..6b1000b6a6a6 100644
--- a/arch/mips/ath79/clock.c
+++ b/arch/mips/ath79/clock.c
@@ -487,17 +487,16 @@ static void __init ath79_clocks_init_dt_ng(struct device_node *np)
{
struct clk *ref_clk;
void __iomem *pll_base;
- const char *dnfn = of_node_full_name(np);
ref_clk = of_clk_get(np, 0);
if (IS_ERR(ref_clk)) {
- pr_err("%s: of_clk_get failed\n", dnfn);
+ pr_err("%pOF: of_clk_get failed\n", np);
goto err;
}
pll_base = of_iomap(np, 0);
if (!pll_base) {
- pr_err("%s: can't map pll registers\n", dnfn);
+ pr_err("%pOF: can't map pll registers\n", np);
goto err_clk;
}
@@ -506,12 +505,12 @@ static void __init ath79_clocks_init_dt_ng(struct device_node *np)
else if (of_device_is_compatible(np, "qca,ar9330-pll"))
ar9330_clk_init(ref_clk, pll_base);
else {
- pr_err("%s: could not find any appropriate clk_init()\n", dnfn);
+ pr_err("%pOF: could not find any appropriate clk_init()\n", np);
goto err_iounmap;
}
if (of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data)) {
- pr_err("%s: could not register clk provider\n", dnfn);
+ pr_err("%pOF: could not register clk provider\n", np);
goto err_iounmap;
}