summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/renesas
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm64/boot/dts/renesas')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7795.dtsi8
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7796.dtsi6
2 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 408ff4e8170a..e94a5f2dbd08 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -157,6 +157,7 @@
enable-method = "psci";
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
operating-points-v2 = <&cluster0_opp>;
+ capacity-dmips-mhz = <1024>;
#cooling-cells = <2>;
};
@@ -169,6 +170,7 @@
enable-method = "psci";
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
operating-points-v2 = <&cluster0_opp>;
+ capacity-dmips-mhz = <1024>;
#cooling-cells = <2>;
};
@@ -181,6 +183,7 @@
enable-method = "psci";
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
operating-points-v2 = <&cluster0_opp>;
+ capacity-dmips-mhz = <1024>;
#cooling-cells = <2>;
};
@@ -193,6 +196,7 @@
enable-method = "psci";
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
operating-points-v2 = <&cluster0_opp>;
+ capacity-dmips-mhz = <1024>;
#cooling-cells = <2>;
};
@@ -205,6 +209,7 @@
enable-method = "psci";
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
+ capacity-dmips-mhz = <535>;
};
a53_1: cpu@101 {
@@ -216,6 +221,7 @@
enable-method = "psci";
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
+ capacity-dmips-mhz = <535>;
};
a53_2: cpu@102 {
@@ -227,6 +233,7 @@
enable-method = "psci";
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
+ capacity-dmips-mhz = <535>;
};
a53_3: cpu@103 {
@@ -238,6 +245,7 @@
enable-method = "psci";
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
+ capacity-dmips-mhz = <535>;
};
L2_CA57: cache-controller-0 {
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index b12bf73bb03b..369d0bccc651 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -162,6 +162,7 @@
enable-method = "psci";
clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
operating-points-v2 = <&cluster0_opp>;
+ capacity-dmips-mhz = <1024>;
#cooling-cells = <2>;
};
@@ -174,6 +175,7 @@
enable-method = "psci";
clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
operating-points-v2 = <&cluster0_opp>;
+ capacity-dmips-mhz = <1024>;
#cooling-cells = <2>;
};
@@ -186,6 +188,7 @@
enable-method = "psci";
clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
+ capacity-dmips-mhz = <535>;
};
a53_1: cpu@101 {
@@ -197,6 +200,7 @@
enable-method = "psci";
clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
+ capacity-dmips-mhz = <535>;
};
a53_2: cpu@102 {
@@ -208,6 +212,7 @@
enable-method = "psci";
clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
+ capacity-dmips-mhz = <535>;
};
a53_3: cpu@103 {
@@ -219,6 +224,7 @@
enable-method = "psci";
clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
+ capacity-dmips-mhz = <535>;
};
L2_CA57: cache-controller-0 {