diff options
Diffstat (limited to 'arch/arm/mach-at91/at91sam9g45.c')
| -rw-r--r-- | arch/arm/mach-at91/at91sam9g45.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 5a0e522ffa94..c0c9fa7b73f0 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c @@ -11,7 +11,6 @@ */ #include <linux/module.h> -#include <linux/pm.h> #include <linux/dma-mapping.h> #include <asm/irq.h> @@ -20,12 +19,12 @@ #include <mach/at91sam9g45.h> #include <mach/at91_pmc.h> #include <mach/at91_rstc.h> -#include <mach/at91_shdwc.h> #include <mach/cpu.h> #include "soc.h" #include "generic.h" #include "clock.h" +#include "sam9_smc.h" /* -------------------------------------------------------------------- * Clocks @@ -298,23 +297,23 @@ void __init at91sam9g45_set_console_clock(int id) static struct at91_gpio_bank at91sam9g45_gpio[] = { { .id = AT91SAM9G45_ID_PIOA, - .offset = AT91_PIOA, + .regbase = AT91SAM9G45_BASE_PIOA, .clock = &pioA_clk, }, { .id = AT91SAM9G45_ID_PIOB, - .offset = AT91_PIOB, + .regbase = AT91SAM9G45_BASE_PIOB, .clock = &pioB_clk, }, { .id = AT91SAM9G45_ID_PIOC, - .offset = AT91_PIOC, + .regbase = AT91SAM9G45_BASE_PIOC, .clock = &pioC_clk, }, { .id = AT91SAM9G45_ID_PIODE, - .offset = AT91_PIOD, + .regbase = AT91SAM9G45_BASE_PIOD, .clock = &pioDE_clk, }, { .id = AT91SAM9G45_ID_PIODE, - .offset = AT91_PIOE, + .regbase = AT91SAM9G45_BASE_PIOE, .clock = &pioDE_clk, } }; @@ -324,12 +323,6 @@ static void at91sam9g45_reset(void) at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); } -static void at91sam9g45_poweroff(void) -{ - at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); -} - - /* -------------------------------------------------------------------- * AT91SAM9G45 processor initialization * -------------------------------------------------------------------- */ @@ -340,10 +333,16 @@ static void __init at91sam9g45_map_io(void) init_consistent_dma_size(SZ_4M); } +static void __init at91sam9g45_ioremap_registers(void) +{ + at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC); + at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT); + at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC); +} + static void __init at91sam9g45_initialize(void) { at91_arch_reset = at91sam9g45_reset; - pm_power_off = at91sam9g45_poweroff; at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); /* Register GPIO subsystem */ @@ -395,6 +394,7 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = { struct at91_init_soc __initdata at91sam9g45_soc = { .map_io = at91sam9g45_map_io, .default_irq_priority = at91sam9g45_default_irq_priority, + .ioremap_registers = at91sam9g45_ioremap_registers, .register_clocks = at91sam9g45_register_clocks, .init = at91sam9g45_initialize, }; |