diff options
| -rw-r--r-- | drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h index 221bb2d65c1c..81433c22fb51 100644 --- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h +++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h @@ -36,10 +36,10 @@ /* Firmware versioning. */ #ifdef DMUB_EXPOSE_VERSION -#define DMUB_FW_VERSION_GIT_HASH 0x26ad601d9 +#define DMUB_FW_VERSION_GIT_HASH 0x9f0af34af #define DMUB_FW_VERSION_MAJOR 0 #define DMUB_FW_VERSION_MINOR 0 -#define DMUB_FW_VERSION_REVISION 39 +#define DMUB_FW_VERSION_REVISION 40 #define DMUB_FW_VERSION_TEST 0 #define DMUB_FW_VERSION_VBIOS 0 #define DMUB_FW_VERSION_HOTFIX 0 @@ -274,6 +274,7 @@ enum dmub_gpint_command { * ARGS: Stream mask, 1 bit per active stream index. */ DMUB_GPINT__IDLE_OPT_NOTIFY_STREAM_MASK = 8, + DMUB_GPINT__PSR_RESIDENCY = 9, }; //============================================================================== @@ -583,6 +584,7 @@ enum dmub_cmd_psr_type { DMUB_CMD__PSR_ENABLE = 2, DMUB_CMD__PSR_DISABLE = 3, DMUB_CMD__PSR_SET_LEVEL = 4, + DMUB_CMD__PSR_FORCE_STATIC = 5, }; enum psr_version { @@ -643,6 +645,10 @@ struct dmub_rb_cmd_psr_set_version { struct dmub_cmd_psr_set_version_data psr_set_version_data; }; +struct dmub_rb_cmd_psr_force_static { + struct dmub_cmd_header header; +}; + union dmub_hw_lock_flags { struct { uint8_t lock_pipe : 1; @@ -800,6 +806,7 @@ union dmub_rb_cmd { struct dmub_rb_cmd_psr_copy_settings psr_copy_settings; struct dmub_rb_cmd_psr_enable psr_enable; struct dmub_rb_cmd_psr_set_level psr_set_level; + struct dmub_rb_cmd_psr_force_static psr_force_static; struct dmub_rb_cmd_PLAT_54186_wa PLAT_54186_wa; struct dmub_rb_cmd_mall mall; struct dmub_rb_cmd_abm_set_pipe abm_set_pipe; |