summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c6
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c4
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c5
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c9
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c25
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c7
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/resource.h1
7 files changed, 52 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
index ae613b025756..b1cc38827f09 100644
--- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
@@ -372,7 +372,8 @@ static const struct resource_caps res_cap = {
.num_timing_generator = 6,
.num_audio = 6,
.num_stream_encoder = 6,
- .num_pll = 3
+ .num_pll = 3,
+ .num_ddc = 6,
};
#define CTX ctx
@@ -1004,6 +1005,9 @@ static bool construct(
"DC: failed to create output pixel processor!\n");
goto res_create_fail;
}
+ }
+
+ for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
pool->base.engines[i] = dce100_aux_engine_create(ctx, i);
if (pool->base.engines[i] == NULL) {
BREAK_TO_DEBUGGER();
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
index 49c5c7037be2..9f44f1cad221 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
@@ -378,6 +378,7 @@ static const struct resource_caps carrizo_resource_cap = {
.num_audio = 3,
.num_stream_encoder = 3,
.num_pll = 2,
+ .num_ddc = 3,
};
static const struct resource_caps stoney_resource_cap = {
@@ -386,6 +387,7 @@ static const struct resource_caps stoney_resource_cap = {
.num_audio = 3,
.num_stream_encoder = 3,
.num_pll = 2,
+ .num_ddc = 3,
};
#define CTX ctx
@@ -1336,7 +1338,9 @@ static bool construct(
"DC: failed to create output pixel processor!\n");
goto res_create_fail;
}
+ }
+ for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
pool->base.engines[i] = dce110_aux_engine_create(ctx, i);
if (pool->base.engines[i] == NULL) {
BREAK_TO_DEBUGGER();
diff --git a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c
index d35dc730e01c..2aa922cdcc58 100644
--- a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c
@@ -384,6 +384,7 @@ static const struct resource_caps polaris_10_resource_cap = {
.num_audio = 6,
.num_stream_encoder = 6,
.num_pll = 8, /* why 8? 6 combo PHY PLL + 2 regular PLLs? */
+ .num_ddc = 6,
};
static const struct resource_caps polaris_11_resource_cap = {
@@ -391,6 +392,7 @@ static const struct resource_caps polaris_11_resource_cap = {
.num_audio = 5,
.num_stream_encoder = 5,
.num_pll = 8, /* why 8? 6 combo PHY PLL + 2 regular PLLs? */
+ .num_ddc = 5,
};
#define CTX ctx
@@ -1286,6 +1288,9 @@ static bool construct(
"DC:failed to create output pixel processor!\n");
goto res_create_fail;
}
+ }
+
+ for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
pool->base.engines[i] = dce112_aux_engine_create(ctx, i);
if (pool->base.engines[i] == NULL) {
BREAK_TO_DEBUGGER();
diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c
index b2fb06f37648..465f68655db2 100644
--- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c
@@ -436,6 +436,7 @@ static const struct resource_caps res_cap = {
.num_audio = 7,
.num_stream_encoder = 6,
.num_pll = 6,
+ .num_ddc = 6,
};
static const struct dc_debug_options debug_defaults = {
@@ -1062,6 +1063,12 @@ static bool construct(
dm_error(
"DC: failed to create output pixel processor!\n");
}
+
+ /* check next valid pipe */
+ j++;
+ }
+
+ for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
pool->base.engines[i] = dce120_aux_engine_create(ctx, i);
if (pool->base.engines[i] == NULL) {
BREAK_TO_DEBUGGER();
@@ -1077,8 +1084,6 @@ static bool construct(
goto res_create_fail;
}
pool->base.sw_i2cs[i] = NULL;
- /* check next valid pipe */
- j++;
}
/* valid pipe num */
diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
index 4eae859e6383..1dc590ccc5f9 100644
--- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
@@ -367,6 +367,7 @@ static const struct resource_caps res_cap = {
.num_audio = 6,
.num_stream_encoder = 6,
.num_pll = 3,
+ .num_ddc = 6,
};
static const struct resource_caps res_cap_81 = {
@@ -374,6 +375,7 @@ static const struct resource_caps res_cap_81 = {
.num_audio = 7,
.num_stream_encoder = 7,
.num_pll = 3,
+ .num_ddc = 6,
};
static const struct resource_caps res_cap_83 = {
@@ -381,6 +383,7 @@ static const struct resource_caps res_cap_83 = {
.num_audio = 6,
.num_stream_encoder = 6,
.num_pll = 2,
+ .num_ddc = 2,
};
static const struct dce_dmcu_registers dmcu_regs = {
@@ -992,7 +995,9 @@ static bool dce80_construct(
dm_error("DC: failed to create output pixel processor!\n");
goto res_create_fail;
}
+ }
+ for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
pool->base.engines[i] = dce80_aux_engine_create(ctx, i);
if (pool->base.engines[i] == NULL) {
BREAK_TO_DEBUGGER();
@@ -1200,6 +1205,16 @@ static bool dce81_construct(
dm_error("DC: failed to create output pixel processor!\n");
goto res_create_fail;
}
+ }
+
+ for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
+ pool->base.engines[i] = dce80_aux_engine_create(ctx, i);
+ if (pool->base.engines[i] == NULL) {
+ BREAK_TO_DEBUGGER();
+ dm_error(
+ "DC:failed to create aux engine!!\n");
+ goto res_create_fail;
+ }
pool->base.hw_i2cs[i] = dce80_i2c_hw_create(ctx, i);
if (pool->base.hw_i2cs[i] == NULL) {
BREAK_TO_DEBUGGER();
@@ -1396,6 +1411,16 @@ static bool dce83_construct(
dm_error("DC: failed to create output pixel processor!\n");
goto res_create_fail;
}
+ }
+
+ for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
+ pool->base.engines[i] = dce80_aux_engine_create(ctx, i);
+ if (pool->base.engines[i] == NULL) {
+ BREAK_TO_DEBUGGER();
+ dm_error(
+ "DC:failed to create aux engine!!\n");
+ goto res_create_fail;
+ }
pool->base.hw_i2cs[i] = dce80_i2c_hw_create(ctx, i);
if (pool->base.hw_i2cs[i] == NULL) {
BREAK_TO_DEBUGGER();
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
index 28ebad8c3ec4..1b519f8f044f 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
@@ -501,6 +501,7 @@ static const struct resource_caps res_cap = {
.num_audio = 4,
.num_stream_encoder = 4,
.num_pll = 4,
+ .num_ddc = 4,
};
static const struct dc_debug_options debug_defaults_drv = {
@@ -1334,7 +1335,11 @@ static bool construct(
dm_error("DC: failed to create tg!\n");
goto fail;
}
+ /* check next valid pipe */
+ j++;
+ }
+ for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
pool->base.engines[i] = dcn10_aux_engine_create(ctx, i);
if (pool->base.engines[i] == NULL) {
BREAK_TO_DEBUGGER();
@@ -1350,8 +1355,6 @@ static bool construct(
goto fail;
}
pool->base.sw_i2cs[i] = NULL;
- /* check next valid pipe */
- j++;
}
/* valid pipe num */
diff --git a/drivers/gpu/drm/amd/display/dc/inc/resource.h b/drivers/gpu/drm/amd/display/dc/inc/resource.h
index 5b321008b0b5..76d00c6dbca9 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/resource.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/resource.h
@@ -44,6 +44,7 @@ struct resource_caps {
int num_stream_encoder;
int num_pll;
int num_dwb;
+ int num_ddc;
};
struct resource_straps {