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author | Hubert Chrzaniuk <hubert.chrzaniuk@intel.com> | 2016-02-10 14:55:22 +0100 |
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committer | Len Brown <len.brown@intel.com> | 2016-03-13 03:55:38 -0400 |
commit | cbf97abaf3689652bcddc0741dc49629d1838142 (patch) | |
tree | c085bc92795c8807a5923542490ecb19c3f21c7d /tools/power/acpi | |
parent | 121b48bb77187cf2ed3053e147d2e6c1e864083c (diff) |
tools/power turbostat: Intel Xeon x200: fix turbo-ratio decoding
Following changes have been made:
- changed MSR_NHM_TURBO_RATIO_LIMIT to MSR_TURBO_RATIO_LIMIT in debug print
for consistency with Developer Manual
- updated definition of bitfields in MSR_TURBO_RATIO_LIMIT and appropriate
parsing code
- added x200 to list of architectures that do not support Nahlem compatible
definition of MSR_TURBO_RATIO_LIMIT register (x200 has the register but
bits definition is custom)
- fixed typo in code that parses MSR_TURBO_RATIO_LIMIT
(logical instead of bitwise operator)
- changed MSR_TURBO_RATIO_LIMIT parsing algorithm so the print out had the
same order as implementations for other platforms
Signed-off-by: Hubert Chrzaniuk <hubert.chrzaniuk@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'tools/power/acpi')
0 files changed, 0 insertions, 0 deletions