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authorAndre Przywara <andre.przywara@arm.com>2020-03-24 13:23:44 +0000
committerDavid S. Miller <davem@davemloft.net>2020-03-24 16:33:04 -0700
commit6a00d0dd3fcfa2ef200973479fbeee62f3681130 (patch)
tree7a290a161719ac290fe203c5d3329b949fa87997 /tools/memory-model/linux-kernel.bell
parent2a9b65ea511cf301150181bef91bb0097dc5bf0b (diff)
net: axienet: Wrap DMA pointer writes to prepare for 64 bit
Newer versions of the Xilink DMA IP support busses with more than 32 address bits, by introducing an MSB word for the registers holding DMA pointers (tail/current, RX/TX descriptor addresses). On IP configured for more than 32 bits, it is also *required* to write both words, to let the IP recognise this as a start condition for an MM2S request, for instance. Wrap the DMA pointer writes with a separate function, to add this functionality later. For now we stick to the lower 32 bits. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/memory-model/linux-kernel.bell')
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