diff options
author | Jeeja KP <jeeja.kp@intel.com> | 2015-11-28 15:01:46 +0530 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2015-12-01 22:17:00 +0000 |
commit | 8f35bf3f71f7b367511e0912eb7b70834b39ef77 (patch) | |
tree | 6ba99f6d477e8a4ee4a414cdd8a52eba279490f8 /sound/soc/intel | |
parent | 3c83ac23253c6a1b6d3ebcb4bb05eabb8337c9df (diff) |
ASoC: Intel: Skylake: Update DMIC DAIs and capabilities
On Skylake we can support upton 4DMICs on the PDM port, so update
the PCM capabilities accordingly
Also add a new DAI for DMIC pin which can be used for getting raw
DMIC data
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Dharageswari.R <dharageswari.r@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/intel')
-rw-r--r-- | sound/soc/intel/skylake/skl-pcm.c | 23 |
1 files changed, 18 insertions, 5 deletions
diff --git a/sound/soc/intel/skylake/skl-pcm.c b/sound/soc/intel/skylake/skl-pcm.c index c79bbff00cb7..6570e5753e49 100644 --- a/sound/soc/intel/skylake/skl-pcm.c +++ b/sound/soc/intel/skylake/skl-pcm.c @@ -28,6 +28,7 @@ #define HDA_MONO 1 #define HDA_STEREO 2 +#define HDA_QUAD 4 static struct snd_pcm_hardware azx_pcm_hw = { .info = (SNDRV_PCM_INFO_MMAP | @@ -46,8 +47,8 @@ static struct snd_pcm_hardware azx_pcm_hw = { SNDRV_PCM_RATE_8000, .rate_min = 8000, .rate_max = 48000, - .channels_min = 2, - .channels_max = 2, + .channels_min = 1, + .channels_max = HDA_QUAD, .buffer_bytes_max = AZX_MAX_BUF_SIZE, .period_bytes_min = 128, .period_bytes_max = AZX_MAX_BUF_SIZE / 2, @@ -560,7 +561,7 @@ static struct snd_soc_dai_driver skl_platform_dai[] = { .capture = { .stream_name = "Reference Capture", .channels_min = HDA_MONO, - .channels_max = HDA_STEREO, + .channels_max = HDA_QUAD, .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000, .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, }, @@ -587,6 +588,18 @@ static struct snd_soc_dai_driver skl_platform_dai[] = { .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, }, }, +{ + .name = "DMIC Pin", + .ops = &skl_pcm_dai_ops, + .capture = { + .stream_name = "DMIC Capture", + .channels_min = HDA_MONO, + .channels_max = HDA_QUAD, + .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, + }, +}, + /* BE CPU Dais */ { .name = "SSP0 Pin", @@ -640,8 +653,8 @@ static struct snd_soc_dai_driver skl_platform_dai[] = { .ops = &skl_dmic_dai_ops, .capture = { .stream_name = "DMIC01 Rx", - .channels_min = HDA_STEREO, - .channels_max = HDA_STEREO, + .channels_min = HDA_MONO, + .channels_max = HDA_QUAD, .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000, .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, }, |