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authorJeeja KP <jeeja.kp@intel.com>2015-11-23 22:26:26 +0530
committerMark Brown <broonie@kernel.org>2015-11-25 17:55:41 +0000
commit06b23d9379d4cd034b7a5edad323ea9419ab2016 (patch)
tree3bf3c1af3d28f286a0610122b9662d8d41bd8ed6 /sound/soc/intel
parent98256f83d2895fda3e596824797762937ab79f6b (diff)
ASoC: Intel: Skylake: Update pcm capability
This patch adds pcm capability to support 16/8k rates and 32 bit formats Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/intel')
-rw-r--r--sound/soc/intel/skylake/skl-pcm.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/sound/soc/intel/skylake/skl-pcm.c b/sound/soc/intel/skylake/skl-pcm.c
index 3c891d78ba58..c79bbff00cb7 100644
--- a/sound/soc/intel/skylake/skl-pcm.c
+++ b/sound/soc/intel/skylake/skl-pcm.c
@@ -39,9 +39,12 @@ static struct snd_pcm_hardware azx_pcm_hw = {
SNDRV_PCM_INFO_HAS_WALL_CLOCK | /* legacy */
SNDRV_PCM_INFO_HAS_LINK_ATIME |
SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
- .formats = SNDRV_PCM_FMTBIT_S16_LE,
- .rates = SNDRV_PCM_RATE_48000,
- .rate_min = 48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S32_LE |
+ SNDRV_PCM_FMTBIT_S24_LE,
+ .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_8000,
+ .rate_min = 8000,
.rate_max = 48000,
.channels_min = 2,
.channels_max = 2,