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authorLionel Landwerlin <lionel.g.landwerlin@intel.com>2017-06-13 12:23:01 +0100
committerBen Widawsky <ben@bwidawsk.net>2017-06-14 12:31:57 -0700
commit3f488d99858d22f584e1734f317bfcff9dbdf4fd (patch)
tree012635a952e9eee7acf2ccb2e47509e04de869fc /mm/memblock.c
parentf532023381df49ac00cb2d1e70df607cf534720d (diff)
drm/i915/perf: rework mux configurations queries
Gen8+ might have mux configurations per slices/subslices. Depending on whether slices/subslices have been fused off, only part of the configuration needs to be applied. This change reworks the mux configurations query mechanism to allow more than one set of registers to be programmed. v2: s/n_mux_regs/n_mux_configs/ (Matthew) Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Diffstat (limited to 'mm/memblock.c')
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