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authorZong Li <zong@andestech.com>2018-08-02 23:21:56 +0800
committerPalmer Dabbelt <palmer@sifive.com>2018-08-13 08:31:31 -0700
commit94f592f0e5b9c17a7505119a2d6c0f1f529ae93d (patch)
tree1756b57cd7fd41d14e9902eba01283caee7d747b /kernel/rseq.c
parent62b0194368147def8c5a77ce604a125d620fc582 (diff)
RISC-V: Add the directive for alignment of stvec's value
The stvec's value must be 4 byte alignment by specification definition. These directives avoid to stvec be set the non-alignment value. Signed-off-by: Zong Li <zong@andestech.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'kernel/rseq.c')
0 files changed, 0 insertions, 0 deletions