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authorParav Pandit <parav@nvidia.com>2021-02-19 08:18:12 +0200
committerSaeed Mahameed <saeedm@nvidia.com>2021-04-02 16:13:05 -0700
commit4c4c0a89abd5c08e91df9bcce4ebcb3433bbb9bf (patch)
tree22aee394130654101d7a663be8a07b3896c52565 /include
parentc6baac47d9e64d42f98ef745ed1f2925efc78440 (diff)
net/mlx5: Pack mlx5_rl_entry structure
mlx5_rl_entry structure is not properly packed as shown below. Due to this an array of size 9144 bytes allocated which is aligned to 16Kbytes. Hence, pack the structure and avoid the wastage. This offers 8Kbytes of saving per mlx5_core_dev struct. pahole -C mlx5_rl_entry drivers/net/ethernet/mellanox/mlx5/core/en_main.o Existing layout: struct mlx5_rl_entry { u8 rl_raw[48]; /* 0 48 */ u16 index; /* 48 2 */ /* XXX 6 bytes hole, try to pack */ u64 refcount; /* 56 8 */ /* --- cacheline 1 boundary (64 bytes) --- */ u16 uid; /* 64 2 */ u8 dedicated:1; /* 66: 0 1 */ /* size: 72, cachelines: 2, members: 5 */ /* sum members: 60, holes: 1, sum holes: 6 */ /* sum bitfield members: 1 bits (0 bytes) */ /* padding: 5 */ /* bit_padding: 7 bits */ /* last cacheline: 8 bytes */ }; After alignment: struct mlx5_rl_entry { u8 rl_raw[48]; /* 0 48 */ u64 refcount; /* 48 8 */ u16 index; /* 56 2 */ u16 uid; /* 58 2 */ u8 dedicated:1; /* 60: 0 1 */ /* size: 64, cachelines: 1, members: 5 */ /* padding: 3 */ /* bit_padding: 7 bits */ }; Signed-off-by: Parav Pandit <parav@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mlx5/driver.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
index 23bb01d7c9b9..a9bd7e3bd554 100644
--- a/include/linux/mlx5/driver.h
+++ b/include/linux/mlx5/driver.h
@@ -517,8 +517,8 @@ struct mlx5_rate_limit {
struct mlx5_rl_entry {
u8 rl_raw[MLX5_ST_SZ_BYTES(set_pp_rate_limit_context)];
- u16 index;
u64 refcount;
+ u16 index;
u16 uid;
u8 dedicated : 1;
};