diff options
| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2015-10-16 17:55:40 -0300 |
|---|---|---|
| committer | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2015-12-03 11:35:34 -0200 |
| commit | e6cd6dc104fc3611326bf69df92090b6b7c78f60 (patch) | |
| tree | 8ebc42f0978bc9a930cf5d82730b1dd31de06840 /drivers | |
| parent | c5ecd4691c797c098013da2bb6167d6bd93df6ae (diff) | |
drm/i915: check for FBC planes in the same place as the pipes
This moves the pre-gen4 check from update() to enable(). The HAS_DDI
in the original code is not needed since only gen 2/3 have the plane
swapping code.
v2: Rebase.
v3: Extract fbc_on_plane_a_only() (Chris).
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_fbc.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index 958f9732dc69..8460e3d72b98 100644 --- a/drivers/gpu/drm/i915/intel_fbc.c +++ b/drivers/gpu/drm/i915/intel_fbc.c @@ -51,6 +51,11 @@ static inline bool fbc_on_pipe_a_only(struct drm_i915_private *dev_priv) return IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8; } +static inline bool fbc_on_plane_a_only(struct drm_i915_private *dev_priv) +{ + return INTEL_INFO(dev_priv)->gen < 4; +} + /* * In some platforms where the CRTC's x:0/y:0 coordinates doesn't match the * frontbuffer's x:0/y:0 coordinates we lie to the hardware about the plane's @@ -514,6 +519,9 @@ static bool crtc_can_fbc(struct intel_crtc *crtc) if (fbc_on_pipe_a_only(dev_priv) && crtc->pipe != PIPE_A) return false; + if (fbc_on_plane_a_only(dev_priv) && crtc->plane != PLANE_A) + return false; + return true; } @@ -802,12 +810,6 @@ static void __intel_fbc_update(struct intel_crtc *crtc) goto out_disable; } - if ((INTEL_INFO(dev_priv)->gen < 4 || HAS_DDI(dev_priv)) && - crtc->plane != PLANE_A) { - set_no_fbc_reason(dev_priv, "FBC unsupported on plane"); - goto out_disable; - } - /* The use of a CPU fence is mandatory in order to detect writes * by the CPU to the scanout and trigger updates to the FBC. */ |