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authorHeiner Kallweit <hkallweit1@gmail.com>2020-05-08 23:32:49 +0200
committerJakub Kicinski <kuba@kernel.org>2020-05-08 22:41:55 -0700
commitce740c5f6f7a2142ca7acee7799996c0beac2980 (patch)
treee7f4bbb4f65e77356716959247898e3a540bc6ad /drivers
parent6f9395c69e62e0ffefaaddf97f32d7690e00f791 (diff)
r8169: improve reset handling for chips from RTL8168g
Sync the reset preparation for chips from RTL8168g with the r8168 and r8125 vendor drivers. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/ethernet/realtek/r8169_main.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
index 47ff514aec39..b4e49c446bd0 100644
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -2535,10 +2535,13 @@ static void rtl8169_hw_reset(struct rtl8169_private *tp)
rtl_loop_wait_low(tp, &rtl_npq_cond, 20, 2000);
break;
case RTL_GIGA_MAC_VER_34 ... RTL_GIGA_MAC_VER_38:
- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_52:
RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 666);
break;
+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_61:
+ rtl_enable_rxdvgate(tp);
+ fsleep(2000);
+ break;
default:
RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
udelay(100);