summaryrefslogtreecommitdiff
path: root/drivers
diff options
context:
space:
mode:
authorTomi Valkeinen <tomi.valkeinen@ti.com>2019-05-28 11:27:32 +0300
committerAndrzej Hajda <a.hajda@samsung.com>2019-05-31 15:41:21 +0200
commitbb24836869a74410fd0a83cfda5381b1f5bd5975 (patch)
treedb53ce9eba4f3c87640258a669bb9b813392c5aa /drivers
parent80d57245063f8cb133a50943a021a8789460101e (diff)
drm/bridge: tc358767: move PXL PLL enable/disable to stream enable/disable
We set up the PXL PLL inside tc_main_link_setup. This is unnecessary, and makes tc_main_link_setup depend on the video-mode, which should not be the case. As PXL PLL is used only for the video stream (and only when using the HW test pattern), let's move the PXL PLL setup into tc_stream_enable. Also, currently the PXL PLL is only disabled if the driver if removed. Let's disable the PXL PLL when the stream is disabled. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190528082747.3631-10-tomi.valkeinen@ti.com
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/bridge/tc358767.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c
index a379b6368157..46975676c88c 100644
--- a/drivers/gpu/drm/bridge/tc358767.c
+++ b/drivers/gpu/drm/bridge/tc358767.c
@@ -877,14 +877,6 @@ static int tc_main_link_setup(struct tc_data *tc)
tc_write(DP1_PLLCTRL, PLLUPDATE | PLLEN);
tc_wait_pll_lock(tc);
- /* PXL PLL setup */
- if (tc_test_pattern) {
- ret = tc_pxl_pll_en(tc, clk_get_rate(tc->refclk),
- 1000 * tc->mode->clock);
- if (ret)
- goto err;
- }
-
/* Reset/Enable Main Links */
dp_phy_ctrl |= DP_PHY_RST | PHY_M1_RST | PHY_M0_RST;
tc_write(DP_PHY_CTRL, dp_phy_ctrl);
@@ -1021,6 +1013,14 @@ static int tc_stream_enable(struct tc_data *tc)
dev_dbg(tc->dev, "enable video stream\n");
+ /* PXL PLL setup */
+ if (tc_test_pattern) {
+ ret = tc_pxl_pll_en(tc, clk_get_rate(tc->refclk),
+ 1000 * tc->mode->clock);
+ if (ret)
+ goto err;
+ }
+
ret = tc_set_video_mode(tc, tc->mode);
if (ret)
return ret;
@@ -1065,6 +1065,8 @@ static int tc_stream_disable(struct tc_data *tc)
tc_write(DP0CTL, 0);
+ tc_pxl_pll_dis(tc);
+
return 0;
err:
return ret;
@@ -1391,8 +1393,6 @@ static int tc_remove(struct i2c_client *client)
drm_bridge_remove(&tc->bridge);
drm_dp_aux_unregister(&tc->aux);
- tc_pxl_pll_dis(tc);
-
return 0;
}