summaryrefslogtreecommitdiff
path: root/drivers/pwm/pwm-sifive.c
diff options
context:
space:
mode:
authorVille Syrjälä <ville.syrjala@linux.intel.com>2021-04-21 18:33:58 +0300
committerJani Nikula <jani.nikula@intel.com>2021-05-12 20:52:24 +0300
commit4819d16d91145966ce03818a95169df1fd56b299 (patch)
tree12982896f3416035c53b6335e10f06ef87b63810 /drivers/pwm/pwm-sifive.c
parenta5c936add6a23c15c6ae538ab7a12f80751fdf0f (diff)
drm/i915: Avoid div-by-zero on gen2
Gen2 tiles are 2KiB in size so i915_gem_object_get_tile_row_size() can in fact return <4KiB, which leads to div-by-zero here. Avoid that. Not sure i915_gem_object_get_tile_row_size() is entirely sane anyway since it doesn't account for the different tile layouts on i8xx/i915... I'm not able to hit this before commit 6846895fde05 ("drm/i915: Replace PIN_NONFAULT with calls to PIN_NOEVICT") and it looks like I also need to run recent version of Mesa. With those in place xonotic trips on this quite easily on my 85x. Cc: stable@vger.kernel.org Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210421153401.13847-2-ville.syrjala@linux.intel.com (cherry picked from commit ed52c62d386f764194e0184fdb905d5f24194cae) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/pwm/pwm-sifive.c')
0 files changed, 0 insertions, 0 deletions