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| author | Bjorn Helgaas <bhelgaas@google.com> | 2014-09-22 12:31:10 -0600 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2014-09-22 12:31:10 -0600 |
| commit | ef39ab79f7401f99212e2ae8a2399d88d6c77c64 (patch) | |
| tree | 6a2eff883789a5cc9dc1af933fa621c72d5bcbfe /drivers/pci | |
| parent | 134cd00d766fc7014b53d9cea67a6bcb894ae51e (diff) | |
| parent | adf70fc087b1750c3792cd56abc6a45e49bb3a11 (diff) | |
| parent | 3fce0e882f61513c45c67e15bd0fde03341b58a5 (diff) | |
| parent | 8665a482dbb5dd4cba44f46e3099e783a3695027 (diff) | |
| parent | 7f1f054b3fac0b19ec0d74e3e18b73785c26f0a8 (diff) | |
| parent | f9dd0ce67db80079484f154a27581e30c28e6938 (diff) | |
Merge branches 'pci/host-designware', 'pci/host-imx6', 'pci/host-keystone', 'pci/host-tegra' and 'pci/host-xilinx' into next
* pci/host-designware:
PCI: designware: Fold struct pcie_port_info into struct pcie_port
* pci/host-imx6:
PCI: imx6: Delay enabling reference clock for SS until it stabilizes
* pci/host-keystone:
PCI: keystone: Set device ID based on SoC to support multiple ports
PCI: keystone: Assume controller is already in RC mode
PCI: keystone: Limit MRSS for all downstream devices
* pci/host-tegra:
PCI: tegra: Add Tegra124 support
PCI: tegra: Make sure the PCIe PLL is really reset
PCI: tegra: Fix extended configuration space mapping
PCI: tegra: Clear CLKREQ# enable on port disable
* pci/host-xilinx:
PCI: xilinx: Fix xilinx_pcie_assign_msi() return value test