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authorBjorn Helgaas <bhelgaas@google.com>2016-03-15 08:55:52 -0500
committerBjorn Helgaas <bhelgaas@google.com>2016-03-15 08:55:52 -0500
commit562df5c8521e1371f3cbd0b7b868034da376d714 (patch)
tree798a5b2f688a60307889c632a20e32aae65d51fa /drivers/pci/host/Kconfig
parentc334f9c89e40d2c9f4598e87e186bf3264d39e51 (diff)
parent5a3aa2a8fae4ce1a3ad786d212b8fffca8ee72f5 (diff)
Merge branch 'pci/host-designware' into next
* pci/host-designware: PCI: designware: Add driver for prototyping kits based on ARC SDP PCI: designware: Add default link up check if sub-driver doesn't override PCI: designware: Add generic dw_pcie_wait_for_link() ARC: Add PCI support
Diffstat (limited to 'drivers/pci/host/Kconfig')
-rw-r--r--drivers/pci/host/Kconfig12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
index 4f8e951d7252..391623e516f0 100644
--- a/drivers/pci/host/Kconfig
+++ b/drivers/pci/host/Kconfig
@@ -16,6 +16,7 @@ config PCI_MVEBU
depends on ARCH_MVEBU || ARCH_DOVE
depends on OF
+
config PCIE_XILINX_NWL
bool "NWL PCIe Core"
depends on ARCH_ZYNQMP
@@ -26,6 +27,17 @@ config PCIE_XILINX_NWL
or End Point. The current option selection will only
support root port enabling.
+config PCIE_DW_PLAT
+ bool "Platform bus based DesignWare PCIe Controller"
+ select PCIE_DW
+ ---help---
+ This selects the DesignWare PCIe controller support. Select this if
+ you have a PCIe controller on Platform bus.
+
+ If you have a controller with this interface, say Y or M here.
+
+ If unsure, say N.
+
config PCIE_DW
bool