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authorYevgeny Kliteynik <kliteyn@nvidia.com>2021-01-20 02:53:28 +0200
committerSaeed Mahameed <saeedm@nvidia.com>2021-01-29 18:12:34 -0800
commitbdbc13c204ee3e742289730618002ff9f21109bf (patch)
tree2cbf1628d47c845e4e08439a815880bb9b379afd /drivers/net
parent46eb3c108fe1744d0a6abfda69ef8c1d4f0e92d4 (diff)
net/mlx5: DR, Fix potential shift wrapping of 32-bit value
Fix 32-bit variable shift wrapping in dr_ste_v0_get_miss_addr. Fixes: 6b93b400aa88 ("net/mlx5: DR, Move STEv0 setters and getters") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c
index b76fdff08890..9ec079247c4b 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c
@@ -248,8 +248,8 @@ static void dr_ste_v0_set_miss_addr(u8 *hw_ste_p, u64 miss_addr)
static u64 dr_ste_v0_get_miss_addr(u8 *hw_ste_p)
{
u64 index =
- (MLX5_GET(ste_rx_steering_mult, hw_ste_p, miss_address_31_6) |
- MLX5_GET(ste_rx_steering_mult, hw_ste_p, miss_address_39_32) << 26);
+ ((u64)MLX5_GET(ste_rx_steering_mult, hw_ste_p, miss_address_31_6) |
+ ((u64)MLX5_GET(ste_rx_steering_mult, hw_ste_p, miss_address_39_32)) << 26);
return index << 6;
}