diff options
author | Jia Jie Ho <ho.jia.jie@intel.com> | 2016-11-14 17:06:49 +0800 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2016-11-15 12:06:24 -0500 |
commit | f6c365fad1034c66f9969d1435ffad9102f966bb (patch) | |
tree | 669d25e33c2b7d8bd02b4cfe5f79f10a680bc1bc /drivers/net/ethernet | |
parent | e76d21c40bd6c67fd4e2c1540d77e113df962b4d (diff) |
net: ethernet: Fix SGMII unable to switch speed and autonego failure
TSE PCS SGMII ethernet has an issue where switching speed doesn't work
caused by a faulty register macro offset. This fixes the issue.
Signed-off-by: Jia Jie Ho <ho.jia.jie@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet')
-rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c b/drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c index 2920e2ee3864..489ef146201e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c +++ b/drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c @@ -63,8 +63,8 @@ #define TSE_PCS_SGMII_LINK_TIMER_0 0x0D40 #define TSE_PCS_SGMII_LINK_TIMER_1 0x0003 #define TSE_PCS_SW_RESET_TIMEOUT 100 -#define TSE_PCS_USE_SGMII_AN_MASK BIT(2) -#define TSE_PCS_USE_SGMII_ENA BIT(1) +#define TSE_PCS_USE_SGMII_AN_MASK BIT(1) +#define TSE_PCS_USE_SGMII_ENA BIT(0) #define SGMII_ADAPTER_CTRL_REG 0x00 #define SGMII_ADAPTER_DISABLE 0x0001 |