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authorIdo Schimmel <idosch@mellanox.com>2020-07-14 17:21:04 +0300
committerDavid S. Miller <davem@davemloft.net>2020-07-14 14:50:49 -0700
commita76423a144a8a109cffbd7311c3278f8a856b25f (patch)
tree3a0d8945924ba124344e030b168fd7ed961921e0 /drivers/net/ethernet
parent0cc32c5b5ca84cd3ad3bbb1441f713d171b1efcf (diff)
mlxsw: pci: Add mirror reason field to CQEv2
The Completion Queue Element version 2 (CQEv2) includes a field called 'mirror_reason' which indicates why the packet was mirrored to the CPU. Add the field so that it can be used by a later patch. Reviewed-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Petr Machata <petrm@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet')
-rw-r--r--drivers/net/ethernet/mellanox/mlxsw/pci_hw.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h b/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h
index 697593e44f8a..a2c1fbd3e0d1 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h
@@ -213,6 +213,11 @@ mlxsw_pci_cqe_item_helpers(dqn, 0, 12, 12);
*/
MLXSW_ITEM32(pci, cqe2, user_def_val_orig_pkt_len, 0x14, 0, 20);
+/* pci_cqe_mirror_reason
+ * Mirror reason.
+ */
+MLXSW_ITEM32(pci, cqe2, mirror_reason, 0x18, 24, 8);
+
/* pci_cqe_owner
* Ownership bit.
*/