diff options
| author | Heiner Kallweit <hkallweit1@gmail.com> | 2018-04-28 22:19:30 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2018-04-30 09:38:19 -0400 |
| commit | 12d42c505eb18c0d1f70ec36cea022bb195e7ba7 (patch) | |
| tree | 31c44d02bc45ca5011a5bb5132d446665a26acb3 /drivers/net/ethernet | |
| parent | 0ae0974eb3d08e2166dd83aa669b63cb84a5ced3 (diff) | |
r8169: improve handling of CPCMD quirk mask
Both quirk masks are the same, so we can merge them. The quirk mask
includes most bits so it's actually easier to define a mask with
the bits to keep.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet')
| -rw-r--r-- | drivers/net/ethernet/realtek/r8169.c | 35 |
1 files changed, 7 insertions, 28 deletions
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c index 868dee7d1131..cf7a7db53791 100644 --- a/drivers/net/ethernet/realtek/r8169.c +++ b/drivers/net/ethernet/realtek/r8169.c @@ -690,6 +690,7 @@ enum rtl_rx_desc_bit { }; #define RsvdMask 0x3fffc000 +#define CPCMD_QUIRK_MASK (Normal_mode | RxVlan | RxChkSum | INTT_MASK) struct TxDesc { __le32 opts1; @@ -5643,22 +5644,11 @@ static void rtl_pcie_state_l2l3_enable(struct rtl8169_private *tp, bool enable) RTL_W8(tp, Config3, data); } -#define R8168_CPCMD_QUIRK_MASK (\ - EnableBist | \ - Mac_dbgo_oe | \ - Force_half_dup | \ - Force_rxflow_en | \ - Force_txflow_en | \ - Cxpl_dbg_sel | \ - ASF | \ - PktCntrDisable | \ - Mac_dbgo_sel) - static void rtl_hw_start_8168bb(struct rtl8169_private *tp) { RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en); - tp->cp_cmd &= ~R8168_CPCMD_QUIRK_MASK; + tp->cp_cmd &= CPCMD_QUIRK_MASK; RTL_W16(tp, CPlusCmd, tp->cp_cmd); if (tp->dev->mtu <= ETH_DATA_LEN) { @@ -5687,7 +5677,7 @@ static void __rtl_hw_start_8168cp(struct rtl8169_private *tp) rtl_disable_clock_request(tp); - tp->cp_cmd &= ~R8168_CPCMD_QUIRK_MASK; + tp->cp_cmd &= CPCMD_QUIRK_MASK; RTL_W16(tp, CPlusCmd, tp->cp_cmd); } @@ -5717,7 +5707,7 @@ static void rtl_hw_start_8168cp_2(struct rtl8169_private *tp) if (tp->dev->mtu <= ETH_DATA_LEN) rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); - tp->cp_cmd &= ~R8168_CPCMD_QUIRK_MASK; + tp->cp_cmd &= CPCMD_QUIRK_MASK; RTL_W16(tp, CPlusCmd, tp->cp_cmd); } @@ -5735,7 +5725,7 @@ static void rtl_hw_start_8168cp_3(struct rtl8169_private *tp) if (tp->dev->mtu <= ETH_DATA_LEN) rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); - tp->cp_cmd &= ~R8168_CPCMD_QUIRK_MASK; + tp->cp_cmd &= CPCMD_QUIRK_MASK; RTL_W16(tp, CPlusCmd, tp->cp_cmd); } @@ -5793,7 +5783,7 @@ static void rtl_hw_start_8168d(struct rtl8169_private *tp) if (tp->dev->mtu <= ETH_DATA_LEN) rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); - tp->cp_cmd &= ~R8168_CPCMD_QUIRK_MASK; + tp->cp_cmd &= CPCMD_QUIRK_MASK; RTL_W16(tp, CPlusCmd, tp->cp_cmd); } @@ -6394,17 +6384,6 @@ static void rtl_hw_start_8168(struct rtl8169_private *tp) RTL_W16(tp, MultiIntr, RTL_R16(tp, MultiIntr) & 0xf000); } -#define R810X_CPCMD_QUIRK_MASK (\ - EnableBist | \ - Mac_dbgo_oe | \ - Force_half_dup | \ - Force_rxflow_en | \ - Force_txflow_en | \ - Cxpl_dbg_sel | \ - ASF | \ - PktCntrDisable | \ - Mac_dbgo_sel) - static void rtl_hw_start_8102e_1(struct rtl8169_private *tp) { static const struct ephy_info e_info_8102e_1[] = { @@ -6544,7 +6523,7 @@ static void rtl_hw_start_8101(struct rtl8169_private *tp) rtl_set_rx_max_size(tp); - tp->cp_cmd &= ~R810X_CPCMD_QUIRK_MASK; + tp->cp_cmd &= CPCMD_QUIRK_MASK; RTL_W16(tp, CPlusCmd, tp->cp_cmd); rtl_set_rx_tx_desc_registers(tp); |