summaryrefslogtreecommitdiff
path: root/drivers/mmc/host
diff options
context:
space:
mode:
authorFaiz Abbas <faiz_abbas@ti.com>2020-06-19 18:27:59 +0530
committerUlf Hansson <ulf.hansson@linaro.org>2020-07-13 12:18:24 +0200
commit0003417d5738fe2c8736aaa9abb3170fa0757689 (patch)
tree0aa500a16fad1ffbc066688d82f813a7007b6a71 /drivers/mmc/host
parentfe52e2fbc6ef3b36dafebde61d1d87717bcde3d4 (diff)
mmc: sdhci_am654: Update delay chain configuration
For speed modes where DLL is not enabled write to TXDLYCLK to enable transmitter delay chain mode. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Link: https://lore.kernel.org/r/20200619125801.9530-6-faiz_abbas@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host')
-rw-r--r--drivers/mmc/host/sdhci_am654.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c
index 8b0f69012d09..f7535ee3a232 100644
--- a/drivers/mmc/host/sdhci_am654.c
+++ b/drivers/mmc/host/sdhci_am654.c
@@ -61,6 +61,8 @@
#define CALDONE_MASK BIT(CALDONE_SHIFT)
#define RETRIM_SHIFT 17
#define RETRIM_MASK BIT(RETRIM_SHIFT)
+#define SELDLYTXCLK_SHIFT 17
+#define SELDLYTXCLK_MASK BIT(SELDLYTXCLK_SHIFT)
#define DRIVER_STRENGTH_50_OHM 0x0
#define DRIVER_STRENGTH_33_OHM 0x1
@@ -228,8 +230,14 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock)
regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, val);
- if (timing > MMC_TIMING_UHS_SDR25 && clock > CLOCK_TOO_SLOW_HZ)
+ if (timing > MMC_TIMING_UHS_SDR25 && clock > CLOCK_TOO_SLOW_HZ) {
+ regmap_update_bits(sdhci_am654->base, PHY_CTRL5,
+ SELDLYTXCLK_MASK, 0);
sdhci_am654_setup_dll(host, clock);
+ } else {
+ regmap_update_bits(sdhci_am654->base, PHY_CTRL5,
+ SELDLYTXCLK_MASK, 1 << SELDLYTXCLK_SHIFT);
+ }
}
static void sdhci_j721e_4bit_set_clock(struct sdhci_host *host,