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authorTodor Tomov <todor.tomov@linaro.org>2018-07-25 12:38:16 -0400
committerMauro Carvalho Chehab <mchehab+samsung@kernel.org>2018-08-02 06:11:19 -0400
commit5ba913b3fca8579d43c24d220d2f579cf3e992af (patch)
treef1cbc90f1ac70507f80226c6077d266fcd406f4d /drivers/media
parent2004fc09b34128182ed26ec7b8f28190e5189061 (diff)
media: camss: csiphy: Ensure clock mux config is done before the rest
Add a write memory barier after clock mux config and before the rest of the csiphy config. Signed-off-by: Todor Tomov <todor.tomov@linaro.org> Signed-off-by: Hans Verkuil <hansverk@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Diffstat (limited to 'drivers/media')
-rw-r--r--drivers/media/platform/qcom/camss/camss-csiphy.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c b/drivers/media/platform/qcom/camss/camss-csiphy.c
index b37e69161712..2a9adcd6ff3c 100644
--- a/drivers/media/platform/qcom/camss/camss-csiphy.c
+++ b/drivers/media/platform/qcom/camss/camss-csiphy.c
@@ -364,6 +364,7 @@ static int csiphy_stream_on(struct csiphy_device *csiphy)
val |= cfg->csid_id;
}
writel_relaxed(val, csiphy->base_clk_mux);
+ wmb();
writel_relaxed(0x1, csiphy->base +
CAMSS_CSI_PHY_GLBL_T_INIT_CFG0);