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authorTodor Tomov <todor.tomov@linaro.org>2018-10-19 17:07:22 +0300
committerSean Paul <seanpaul@chromium.org>2018-12-03 08:46:13 -0500
commitee4456359640defe3f51cc6b728bfce4bc444c9e (patch)
treef9f02260f621aed247323ce048e90185da8d5bd8 /drivers/iio/humidity
parent7f9743abaa79d3491fee7a0446461b0fdd2aeaa5 (diff)
drm/msm/hdmi: Enable HPD after HDMI IRQ is set up
SoCs that contain MDP5 have a top level wrapper called MDSS that manages locks, power and irq for the sub-blocks within it. Irq for HDMI is also routed through the MDSS. Shortly after the Hot Plug Detection (HPD) is enabled in HDMI, HDMI interrupts are recieved by the MDSS interrupt handler. However at this moment the HDMI irq is still not mapped to the MDSS irq domain so the HDMI irq handler cannot be called to process the interrupts. This leads to a flood of HDMI interrupts on CPU 0. If we are lucky to have the HDMI initialization running on a different CPU, it will eventually map the HDMI irq to MDSS irq domain, the next HDMI interrupt will be handled by the HDMI irq handler, the interrupt flood will stop and we will recover. If the HDMI initialization is running on CPU 0, then it cannot complete and there is nothing to stop the interrupt flood on CPU 0. The system is stuck. Fix this by moving the HPD enablement after the HDMI irq is mapped to the MDSS irq domain. Signed-off-by: Todor Tomov <todor.tomov@linaro.org> Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
Diffstat (limited to 'drivers/iio/humidity')
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