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authorThierry Reding <treding@nvidia.com>2019-09-16 16:19:26 +0200
committerBen Skeggs <bskeggs@redhat.com>2019-09-17 14:50:16 +1000
commitb568db62c5c46c8d859f1b9538495ea0fcbe7000 (patch)
tree54aedd05407125fa570bcffbe31e8295c8d8cac0 /drivers/gpu/drm
parent641f53c07d2760f1a53288c3cab0300030f049cb (diff)
drm/nouveau/bar/gm20b: Avoid BAR1 teardown during init
Writing the 0x1704 (BUS_BAR1_BLOCK) register causes the GPU to probe the memory region at the programmed address. The result is an address decode error in the external memory controller because address 0, which is what is written to the register, is not designated as accessible to devices. Avoid triggering DMA from the GPU by removing teardown of the BAR1. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/bar/gm20b.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gm20b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gm20b.c
index 950bff1955ad..1ed6170891c4 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gm20b.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gm20b.c
@@ -26,7 +26,6 @@ gm20b_bar_func = {
.dtor = gf100_bar_dtor,
.oneinit = gf100_bar_oneinit,
.bar1.init = gf100_bar_bar1_init,
- .bar1.fini = gf100_bar_bar1_fini,
.bar1.wait = gm107_bar_bar1_wait,
.bar1.vmm = gf100_bar_bar1_vmm,
.flush = g84_bar_flush,