diff options
| author | Feifei Xu <Feifei.Xu@amd.com> | 2017-11-23 14:08:34 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-12-06 12:48:19 -0500 |
| commit | 18297a215ba44a9a28aea87486ec52aecf807e13 (patch) | |
| tree | c789683aef032fe27a9bb20f3722f9eff7b210b1 /drivers/gpu/drm | |
| parent | 5d735f83c2b06ba51f2fae6404da576c6847cb64 (diff) | |
drm/amd/include:cleanup vega10 vce header files.
Cleanup asic_reg/vega10/VCE folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/include/asic_reg/vce/vce_4_0_default.h (renamed from drivers/gpu/drm/amd/include/asic_reg/vega10/VCE/vce_4_0_default.h) | 0 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/include/asic_reg/vce/vce_4_0_offset.h (renamed from drivers/gpu/drm/amd/include/asic_reg/vega10/VCE/vce_4_0_offset.h) | 0 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/include/asic_reg/vce/vce_4_0_sh_mask.h (renamed from drivers/gpu/drm/amd/include/asic_reg/vega10/VCE/vce_4_0_sh_mask.h) | 0 |
5 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c index 83e26caf1211..c122e95efe7d 100644 --- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c @@ -32,9 +32,9 @@ #include "vega10/soc15ip.h" #include "uvd/uvd_7_0_offset.h" #include "uvd/uvd_7_0_sh_mask.h" -#include "vega10/VCE/vce_4_0_offset.h" -#include "vega10/VCE/vce_4_0_default.h" -#include "vega10/VCE/vce_4_0_sh_mask.h" +#include "vce/vce_4_0_offset.h" +#include "vce/vce_4_0_default.h" +#include "vce/vce_4_0_sh_mask.h" #include "vega10/NBIF/nbif_6_1_offset.h" #include "hdp/hdp_4_0_offset.h" #include "vega10/MMHUB/mmhub_1_0_offset.h" diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c index 75745544600a..1b28c91506eb 100644 --- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c @@ -33,9 +33,9 @@ #include "mmsch_v1_0.h" #include "vega10/soc15ip.h" -#include "vega10/VCE/vce_4_0_offset.h" -#include "vega10/VCE/vce_4_0_default.h" -#include "vega10/VCE/vce_4_0_sh_mask.h" +#include "vce/vce_4_0_offset.h" +#include "vce/vce_4_0_default.h" +#include "vce/vce_4_0_sh_mask.h" #include "vega10/MMHUB/mmhub_1_0_offset.h" #include "vega10/MMHUB/mmhub_1_0_sh_mask.h" diff --git a/drivers/gpu/drm/amd/include/asic_reg/vega10/VCE/vce_4_0_default.h b/drivers/gpu/drm/amd/include/asic_reg/vce/vce_4_0_default.h index c2a46c7c448c..c2a46c7c448c 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/vega10/VCE/vce_4_0_default.h +++ b/drivers/gpu/drm/amd/include/asic_reg/vce/vce_4_0_default.h diff --git a/drivers/gpu/drm/amd/include/asic_reg/vega10/VCE/vce_4_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/vce/vce_4_0_offset.h index 109303e1b08d..109303e1b08d 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/vega10/VCE/vce_4_0_offset.h +++ b/drivers/gpu/drm/amd/include/asic_reg/vce/vce_4_0_offset.h diff --git a/drivers/gpu/drm/amd/include/asic_reg/vega10/VCE/vce_4_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/vce/vce_4_0_sh_mask.h index 4cf6e4424198..4cf6e4424198 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/vega10/VCE/vce_4_0_sh_mask.h +++ b/drivers/gpu/drm/amd/include/asic_reg/vce/vce_4_0_sh_mask.h |