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authorChris Wilson <chris@chris-wilson.co.uk>2016-07-06 12:39:02 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2016-07-06 12:47:39 +0100
commitaca34b6e1ca909ba15f6c1c1dc89bea8f455403f (patch)
treea2951a0be74a87f21e6170674dc39f4dbc301a2b /drivers/gpu/drm/nouveau/nouveau_abi16.h
parent99fe4a5f7383559ee120492124365e708a587130 (diff)
drm/i915: Group the irq breadcrumb variables into the same cacheline
As we inspect both the tasklet (to check for an active bottom-half) and set the irq-posted flag at the same time (both in the interrupt handler and then in the bottom-halt), group those two together into the same cacheline. (Not having total control over placement of the struct means we can't guarantee the cacheline boundary, we need to align the kmalloc and then each struct, but the grouping should help.) v2: Try a couple of different names for the state touched by the user interrupt handler. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1467805142-22219-3-git-send-email-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_abi16.h')
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