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authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-07-26 11:16:14 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-07-26 13:29:30 +0200
commit20b46e59dd102665ce7168baa215e5b1ee66b69b (patch)
tree1b5aa011ce1cb8d64437660c14a3057b99b92bcd /drivers/gpu/drm/i915/i915_drv.h
parente6994aeedcee4f71998d89d2c10c5baa419ebeac (diff)
drm/i915: Only set the down rps limit when at the loweset frequency
The power docs say that when the gt leaves rc6, it is in the lowest frequency and only about 25 usec later will switch to the frequency selected in GEN6_RPNSWREQ. If the downclock limit expires in that window and the down limit is set to the lowest possible frequency, the hw will not send the down interrupt. Which leads to a too high gpu clock and wasted power. Chris Wilson already worked on this with commit 7b9e0ae6da0a7eaf2680a1a788f08df123724f3b Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Sat Apr 28 08:56:39 2012 +0100 drm/i915: Always update RPS interrupts thresholds along with frequency but got the logic inverted: The current code set the down limit as long as we haven't reached it. Instead of only once with reached the lowest frequency. Note that we can't always set the downclock limit to 0, because otherwise the hw will keep on bugging us with downclock request irqs once the lowest level is reached. For similar reasons also always set the upclock limit, otherwise the hw might poke us again with interrupts. v2: Chris Wilson noticed that the limit reg is also computed in sanitize_pm. To avoid duplication, extract the code into a common function. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
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