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authorRex Zhu <Rex.Zhu@amd.com>2018-01-04 16:42:06 +0800
committerAlex Deucher <alexander.deucher@amd.com>2018-02-19 14:17:55 -0500
commit11f64ff5f323d697d0e3be932aaaaa5b38b144cd (patch)
treed60a52b7c3b1cd1c9e4cfcddb361eb9199983e17 /drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
parent59fc8cde739bc81464d214b23fd717f24608eb75 (diff)
drm/amd/pp: Add a new pp feature mask bit for OD feature
when this bit was set on module load, driver will allow the user over/under gpu clock and voltage through sysfs. by default, this bit was not set. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 0bb34db265ec..46a0c937e8f0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -120,7 +120,7 @@ uint amdgpu_pg_mask = 0xffffffff;
uint amdgpu_sdma_phase_quantum = 32;
char *amdgpu_disable_cu = NULL;
char *amdgpu_virtual_display = NULL;
-uint amdgpu_pp_feature_mask = 0xffffffff;
+uint amdgpu_pp_feature_mask = 0x3fff;
int amdgpu_ngg = 0;
int amdgpu_prim_buf_per_se = 0;
int amdgpu_pos_buf_per_se = 0;