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authorMichael Chan <michael.chan@broadcom.com>2019-02-20 19:07:31 -0500
committerDavid S. Miller <davem@davemloft.net>2019-02-22 15:16:56 -0800
commit67681d02aaa1db9044a16df4ca9c77cde1221a3e (patch)
treee09897c5f69147cda43aaeb2b5fcde31871a35db /drivers/fpga/altera-pr-ip-core-plat.c
parentab01f251c9da8dc5ae70041ae6a2a50e8b94c079 (diff)
bnxt_en: Fix typo in firmware message timeout logic.
The logic that polls for the firmware message response uses a shorter sleep interval for the first few passes. But there was a typo so it was using the wrong counter (larger counter) for these short sleep passes. The result is a slightly shorter timeout period for these firmware messages than intended. Fix it by using the proper counter. Fixes: 9751e8e71487 ("bnxt_en: reduce timeout on initial HWRM calls") Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/fpga/altera-pr-ip-core-plat.c')
0 files changed, 0 insertions, 0 deletions