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authorGiovanni Cabiddu <giovanni.cabiddu@intel.com>2020-07-30 13:27:42 +0100
committerHerbert Xu <herbert@gondor.apana.org.au>2020-08-21 14:43:50 +1000
commit9a5a668dc348f98de464114411421c4e9381cf21 (patch)
tree1c6058a693b5fb3d4deae666d481f75b65b2dcb3 /drivers/crypto/qat
parent9123e3a74ec7b934a4a099e98af6a61c2f80bbf5 (diff)
crypto: qat - add delay before polling mailbox
The mailbox CSR register has a write latency and requires a delay before being read. This patch replaces readl_poll_timeout with read_poll_timeout that allows to sleep before read. The initial sleep was removed when the mailbox poll loop was replaced with readl_poll_timeout. Fixes: a79d471c6510 ("crypto: qat - update timeout logic in put admin msg") Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/qat')
-rw-r--r--drivers/crypto/qat/qat_common/adf_admin.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/crypto/qat/qat_common/adf_admin.c b/drivers/crypto/qat/qat_common/adf_admin.c
index 1c8ca151a963..ec9b390276d6 100644
--- a/drivers/crypto/qat/qat_common/adf_admin.c
+++ b/drivers/crypto/qat/qat_common/adf_admin.c
@@ -131,9 +131,10 @@ static int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev, u32 ae,
memcpy(admin->virt_addr + offset, in, ADF_ADMINMSG_LEN);
ADF_CSR_WR(mailbox, mb_offset, 1);
- ret = readl_poll_timeout(mailbox + mb_offset, status,
- status == 0, ADF_ADMIN_POLL_DELAY_US,
- ADF_ADMIN_POLL_TIMEOUT_US);
+ ret = read_poll_timeout(ADF_CSR_RD, status, status == 0,
+ ADF_ADMIN_POLL_DELAY_US,
+ ADF_ADMIN_POLL_TIMEOUT_US, true,
+ mailbox, mb_offset);
if (ret < 0) {
/* Response timeout */
dev_err(&GET_DEV(accel_dev),