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authorDaniel Lezcano <daniel.lezcano@linaro.org>2015-01-25 22:06:02 +0100
committerDaniel Lezcano <daniel.lezcano@linaro.org>2015-01-29 14:02:13 +0100
commit468b8c4cf3962d4d24eca58da18bb63368ff4fcd (patch)
tree52c308241080e8079310a21e3cd7354e235e5033 /drivers/clocksource/Kconfig
parent8d8bd7be8bf0981564fd557d4b68eeeaaa2325d0 (diff)
clockevents: rockchip: Add rockchip timer for rk3288
The rk3288 board uses the architected timers and these ones are shutdown when the cpu is powered down. There is a need of a broadcast timer in this case to ensure proper wakeup when the cpus are in sleep mode and a timer expires. This driver provides the basic timer functionnality as a backup for the local timers at sleep time. The timer belongs to the alive subsystem. It includes two programmables 64 bits timer channels but the driver only uses 32bits. It works with two operations mode: free running and user defined count. Programing sequence: 1. Timer initialization: * Disable the timer by writing '0' to the CONTROLREG register * Program the timer mode by writing the mode to the CONTROLREG register * Set the interrupt mask 2. Setting the count value: * Load the count value to the registers COUNT0 and COUNT1 (not used). 3. Enable the timer * Write '1' to the CONTROLREG register with the mode (free running or user) Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/clocksource/Kconfig')
-rw-r--r--drivers/clocksource/Kconfig4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index bfaaae4c21b4..a89120bf640c 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -26,6 +26,10 @@ config DW_APB_TIMER_OF
select DW_APB_TIMER
select CLKSRC_OF
+config ROCKCHIP_TIMER
+ bool
+ select CLKSRC_OF
+
config ARMADA_370_XP_TIMER
bool
select CLKSRC_OF