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author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2018-06-10 21:24:13 +0300 |
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committer | Kishon Vijay Abraham I <kishon@ti.com> | 2018-07-10 13:45:11 +0530 |
commit | 2ce7f2f425ef7464a2a9a872d2e9acad49e6cb3e (patch) | |
tree | 52f244f66f7d5fa0d8d43704fd044c5b65bed63a /drivers/clocksource/Kconfig | |
parent | 4fa88cd3370ed33119863747a4db7f5e3f1dc308 (diff) |
phy: Renesas R-Car gen3 PCIe PHY driver
This PHY is still mostly undocumented -- the only documented registers
exist on R-Car V3H (R8A77980) SoC where this PHY stays in a powered-down
state after a reset and thus we must power it up for PCIe to work...
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/clocksource/Kconfig')
0 files changed, 0 insertions, 0 deletions