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authorSowjanya Komatineni <skomatineni@nvidia.com>2020-05-04 19:31:54 -0700
committerThierry Reding <treding@nvidia.com>2020-05-12 22:47:14 +0200
commit796705bcb10c4c2af9c5b86bf7feeb5c6791d1d7 (patch)
tree06bb2cd80c908f38633cfec262d52bf999adbfff /drivers/clk
parent8f3d9f354286745c751374f5f1fcafee6b3f3136 (diff)
dt-bindings: clock: tegra: Add clock ID for CSI TPG clock
Tegra210 uses PLLD out internally for CSI TPG. This patch adds a clock ID for this CSI TPG clock from PLLD. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk')
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