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authorJerome Brunet <jbrunet@baylibre.com>2018-05-22 18:34:54 +0200
committerJerome Brunet <jbrunet@baylibre.com>2018-07-09 13:47:22 +0200
commite8dd9207763e0317ac256c78dcd50dca7826f2f6 (patch)
treec4bf922250513c13ed6ffd510c83a44e3e9c39b1 /drivers/clk/clk-si5351.c
parent47f21315a6e4454ed9d8a450288a0989113e1e44 (diff)
clk: meson: add triple phase clock driver
Add a driver to control the output of the sample clock generator found in the axg audio clock controller. The goal of this driver is to coherently control the phase provided to the different element using the sample clock generator. This simplify the usage of the sample clock generator a lot, without comprising the ability of the SoC. Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Diffstat (limited to 'drivers/clk/clk-si5351.c')
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