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authorChris Wilson <chris@chris-wilson.co.uk>2016-07-01 17:23:23 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2016-07-01 21:00:54 +0100
commit3d5564e91025bd17d93d0a23ebf8e22309652591 (patch)
treecc05b709edc9aa5dee158b2a28631de5f8c35ae2 /drivers/ata
parent7ec2c73b1dbe1cd83c52e4a386b2070331c5414c (diff)
drm/i915: Only apply one barrier after a breadcrumb interrupt is posted
If we flag the seqno as potentially stale upon receiving an interrupt, we can use that information to reduce the frequency that we apply the heavyweight coherent seqno read (i.e. if we wake up a chain of waiters). v2: Use cmpxchg to replace READ_ONCE/WRITE_ONCE for more explicit control of the ordering wrt to interrupt generation and interrupt checking in the bottom-half. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1467390209-3576-14-git-send-email-chris@chris-wilson.co.uk
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