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authorAndrew Jeffery <andrew@aj.id.au>2016-11-03 01:07:56 +1030
committerLinus Walleij <linus.walleij@linaro.org>2016-11-07 10:31:33 +0100
commita33547cc764ca994d27a8fcc5fc61fbf4b2f7361 (patch)
tree6c59b8286b7b23a5841559c6d97ab1c68db43780 /crypto/ecc.c
parentd2cdf5dc58f6970e9d9d26e47974c21fe87983f3 (diff)
pinctrl-aspeed-g5: Never set SCU90[6]
If a pin depending on bit 6 in SCU90 is requested for GPIO, the export will succeed but changes to the GPIO's value will not be accepted by the hardware. This is because the pinmux driver has misconfigured the SCU by writing 1 to the reserved bit. The description of SCU90[6] from the datasheet is 'Reserved, must keep at value ”0”'. The fix is to switch pinmux from the bit-flipping macro to explicitly configuring the .enable and .disable values to zero. The patch has been tested on an AST2500 EVB. Fixes: 56e57cb6c07f (pinctrl: Add pinctrl-aspeed-g5 driver) Reported-by: Uma Yadlapati <yadlapat@us.ibm.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'crypto/ecc.c')
0 files changed, 0 insertions, 0 deletions