diff options
| author | Carlos Corbacho <cathectic@gmail.com> | 2007-10-19 18:51:27 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2007-10-23 22:37:25 +0200 |
| commit | d79a5f80dc1153d3f637dfcf3808066414fbb51a (patch) | |
| tree | a9278d7d4c922483bdfb5ed29a2225a34bda2604 /arch | |
| parent | fa76dab935b856871024530ec818bc0a8f88a016 (diff) | |
x86: Force enable HPET for CK804 (nForce 4) chipsets
This patch adds a quirk from LinuxBIOS to force enable HPET on
the nVidia CK804 (nForce 4) chipset.
This quirk can very likely support more than just nForce 4
(LinuxBIOS use the same code for nForce 5), and possibly nForce 3,
but I don't have those chipsets, so cannot add and test them.
Tested on an Abit KN9 (CK804).
Signed-off-by: Carlos Corbacho <cathectic@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Documentation/kernel-parameters.txt | 3 +-
arch/x86/kernel/quirks.c | 37 +++++++++++++++++++++++++++++++++++-
2 files changed, 38 insertions(+), 2 deletions(-)
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/kernel/quirks.c | 37 |
1 files changed, 36 insertions, 1 deletions
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c index a4ce1911efdf..5317c40efd13 100644 --- a/arch/x86/kernel/quirks.c +++ b/arch/x86/kernel/quirks.c @@ -60,7 +60,8 @@ static enum { NONE_FORCE_HPET_RESUME, OLD_ICH_FORCE_HPET_RESUME, ICH_FORCE_HPET_RESUME, - VT8237_FORCE_HPET_RESUME + VT8237_FORCE_HPET_RESUME, + NVIDIA_FORCE_HPET_RESUME, } force_hpet_resume_type; static void __iomem *rcba_base; @@ -321,6 +322,37 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, vt8237_force_enable_hpet); +/* + * Undocumented chipset feature taken from LinuxBIOS. + */ +static void nvidia_force_hpet_resume(void) +{ + pci_write_config_dword(cached_dev, 0x44, 0xfed00001); + printk(KERN_DEBUG "Force enabled HPET at resume\n"); +} + +static void nvidia_force_enable_hpet(struct pci_dev *dev) +{ + u32 uninitialized_var(val); + + if (!hpet_force_user || hpet_address || force_hpet_address) + return; + + pci_write_config_dword(dev, 0x44, 0xfed00001); + pci_read_config_dword(dev, 0x44, &val); + force_hpet_address = val & 0xfffffffe; + force_hpet_resume_type = NVIDIA_FORCE_HPET_RESUME; + printk(KERN_DEBUG "Force enabled HPET at base address 0x%lx\n", + force_hpet_address); + cached_dev = dev; + return; +} + +/* ISA Bridges */ +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NVIDIA, 0x0050, + nvidia_force_enable_hpet); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NVIDIA, 0x0051, + nvidia_force_enable_hpet); void force_hpet_resume(void) { @@ -334,6 +366,9 @@ void force_hpet_resume(void) case VT8237_FORCE_HPET_RESUME: return vt8237_force_hpet_resume(); + case NVIDIA_FORCE_HPET_RESUME: + return nvidia_force_hpet_resume(); + default: break; } |