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authorVarun Sethi <Varun.Sethi@freescale.com>2012-11-20 19:24:55 +0530
committerKumar Gala <galak@kernel.crashing.org>2012-11-25 07:19:39 -0600
commit5320b50797a9a5373f31f5b1c26346357f73e179 (patch)
tree4b22c04208281613c9ec6e327b8bebcbdc4a5af2 /arch
parentbc15236fbed1e017b465e38a9d2092393778a2f7 (diff)
powerpc/iommu/fsl: Add PAMU bypass enable register to ccsr_guts struct
PAMU bypass enable register added to the ccsr_guts structure. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/include/asm/fsl_guts.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/fsl_guts.h b/arch/powerpc/include/asm/fsl_guts.h
index dd5ba2c22771..77ced0b3d81d 100644
--- a/arch/powerpc/include/asm/fsl_guts.h
+++ b/arch/powerpc/include/asm/fsl_guts.h
@@ -71,7 +71,9 @@ struct ccsr_guts {
u8 res0c4[0x224 - 0xc4];
__be32 iodelay1; /* 0x.0224 - IO delay control register 1 */
__be32 iodelay2; /* 0x.0228 - IO delay control register 2 */
- u8 res22c[0x800 - 0x22c];
+ u8 res22c[0x604 - 0x22c];
+ __be32 pamubypenr; /* 0x.604 - PAMU bypass enable register */
+ u8 res608[0x800 - 0x608];
__be32 clkdvdr; /* 0x.0800 - Clock Divide Register */
u8 res804[0x900 - 0x804];
__be32 ircr; /* 0x.0900 - Infrared Control Register */