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authorPaul Mundt <lethal@linux-sh.org>2010-01-26 12:58:40 +0900
committerPaul Mundt <lethal@linux-sh.org>2010-01-26 12:58:40 +0900
commit9d56dd3b083a3bec56e9da35ce07baca81030b03 (patch)
treea9df9d514fbc32defc1ca8a6d7c2795f15b8a128 /arch/sh/boards/mach-se/7722
parenta077e91690fb32a1453423b2cf1df3492fd30c3a (diff)
sh: Mass ctrl_in/outX to __raw_read/writeX conversion.
The old ctrl in/out routines are non-portable and unsuitable for cross-platform use. While drivers/sh has already been sanitized, there is still quite a lot of code that is not. This converts the arch/sh/ bits over, which permits us to flag the routines as deprecated whilst still building with -Werror for the architecture code, and to ensure that future users are not added. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boards/mach-se/7722')
-rw-r--r--arch/sh/boards/mach-se/7722/irq.c10
-rw-r--r--arch/sh/boards/mach-se/7722/setup.c34
2 files changed, 22 insertions, 22 deletions
diff --git a/arch/sh/boards/mach-se/7722/irq.c b/arch/sh/boards/mach-se/7722/irq.c
index b221b6842b0d..61605db04ee6 100644
--- a/arch/sh/boards/mach-se/7722/irq.c
+++ b/arch/sh/boards/mach-se/7722/irq.c
@@ -21,13 +21,13 @@ unsigned int se7722_fpga_irq[SE7722_FPGA_IRQ_NR] = { 0, };
static void disable_se7722_irq(unsigned int irq)
{
unsigned int bit = (unsigned int)get_irq_chip_data(irq);
- ctrl_outw(ctrl_inw(IRQ01_MASK) | 1 << bit, IRQ01_MASK);
+ __raw_writew(__raw_readw(IRQ01_MASK) | 1 << bit, IRQ01_MASK);
}
static void enable_se7722_irq(unsigned int irq)
{
unsigned int bit = (unsigned int)get_irq_chip_data(irq);
- ctrl_outw(ctrl_inw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK);
+ __raw_writew(__raw_readw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK);
}
static struct irq_chip se7722_irq_chip __read_mostly = {
@@ -39,7 +39,7 @@ static struct irq_chip se7722_irq_chip __read_mostly = {
static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc)
{
- unsigned short intv = ctrl_inw(IRQ01_STS);
+ unsigned short intv = __raw_readw(IRQ01_STS);
unsigned int ext_irq = 0;
intv &= (1 << SE7722_FPGA_IRQ_NR) - 1;
@@ -59,8 +59,8 @@ void __init init_se7722_IRQ(void)
{
int i, irq;
- ctrl_outw(0, IRQ01_MASK); /* disable all irqs */
- ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */
+ __raw_writew(0, IRQ01_MASK); /* disable all irqs */
+ __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */
for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) {
irq = create_irq();
diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c
index 93675418171d..80a4e571b310 100644
--- a/arch/sh/boards/mach-se/7722/setup.c
+++ b/arch/sh/boards/mach-se/7722/setup.c
@@ -156,32 +156,32 @@ device_initcall(se7722_devices_setup);
static void __init se7722_setup(char **cmdline_p)
{
- ctrl_outw(0x010D, FPGA_OUT); /* FPGA */
+ __raw_writew(0x010D, FPGA_OUT); /* FPGA */
- ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */
- ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */
+ __raw_writew(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */
+ __raw_writew(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */
/* LCDC I/O */
- ctrl_outw(0x0020, PORT_PSELD);
+ __raw_writew(0x0020, PORT_PSELD);
/* SIOF1*/
- ctrl_outw(0x0003, PORT_PSELB);
- ctrl_outw(0xe000, PORT_PSELC);
- ctrl_outw(0x0000, PORT_PKCR);
+ __raw_writew(0x0003, PORT_PSELB);
+ __raw_writew(0xe000, PORT_PSELC);
+ __raw_writew(0x0000, PORT_PKCR);
/* LCDC */
- ctrl_outw(0x4020, PORT_PHCR);
- ctrl_outw(0x0000, PORT_PLCR);
- ctrl_outw(0x0000, PORT_PMCR);
- ctrl_outw(0x0002, PORT_PRCR);
- ctrl_outw(0x0000, PORT_PXCR); /* LCDC,CS6A */
+ __raw_writew(0x4020, PORT_PHCR);
+ __raw_writew(0x0000, PORT_PLCR);
+ __raw_writew(0x0000, PORT_PMCR);
+ __raw_writew(0x0002, PORT_PRCR);
+ __raw_writew(0x0000, PORT_PXCR); /* LCDC,CS6A */
/* KEYSC */
- ctrl_outw(0x0A10, PORT_PSELA); /* BS,SHHID2 */
- ctrl_outw(0x0000, PORT_PYCR);
- ctrl_outw(0x0000, PORT_PZCR);
- ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
- ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
+ __raw_writew(0x0A10, PORT_PSELA); /* BS,SHHID2 */
+ __raw_writew(0x0000, PORT_PYCR);
+ __raw_writew(0x0000, PORT_PZCR);
+ __raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
+ __raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
}
/*