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authorJoerg Roedel <jroedel@suse.de>2018-03-29 15:24:40 +0200
committerJoerg Roedel <jroedel@suse.de>2018-03-29 15:24:40 +0200
commitd4f96fd5c249defda290299f9646287dd3df0803 (patch)
tree8c51a9c15d70e16fe686ea26b800b048335eaacf /arch/riscv/Makefile
parent29d049be9438278c47253a74cf8d0ddf36bd5d68 (diff)
parentf746a025d35f6c73e6021d0e37166e048cda36ed (diff)
parent57c26957bd87a9f3b84043d0ee9cf47852a82ff9 (diff)
parentb6d57f1da7e81cb056619d41cf015ebe306c296c (diff)
parent70ca608b2ec6dafa6bb1c2b0691852fc78f8f717 (diff)
parent6d7cf02a8660cf5570b20017df4b14a2ddbd1694 (diff)
parent9fe77e0166ae453d61954e8200b90ac7000242de (diff)
parent7868805969942a424118b7da5233946e53ce69be (diff)
parentf51dc89265dabad36f1cd832a581106cf4e50158 (diff)
Merge branches 'x86/amd', 'x86/vt-d', 'arm/rockchip', 'arm/omap', 'arm/mediatek', 'arm/exynos', 'arm/renesas', 'arm/smmu' and 'core' into next