diff options
| author | Andreas Herrmann <andreas.herrmann3@amd.com> | 2012-10-19 11:02:09 +0200 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2012-11-13 11:22:31 -0800 |
| commit | 27d3a8a26ada7660116fdd6830096008c063ee96 (patch) | |
| tree | f532e9052693b9a1cdf82ae162de0496753a004e /arch/powerpc/sysdev/fsl_rmu.c | |
| parent | 2e8458dfe4202df75543402c7343b8f94de4101e (diff) | |
x86, cacheinfo: Base cache sharing info on CPUID 0x8000001d on AMD
The patch is based on a patch submitted by Hans Rosenfeld.
See http://marc.info/?l=linux-kernel&m=133908777200931
Note that CPUID Fn8000_001D_EAX slightly differs to Intel's CPUID function 4.
Bits 14-25 contain NumSharingCache. Actual number of cores sharing
this cache. SW to add value of one to get result.
The corresponding bits on Intel are defined as "maximum number of threads
sharing this cache" (with a "plus 1" encoding).
Thus a different method to determine which cores are sharing a cache
level has to be used.
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
Link: http://lkml.kernel.org/r/20121019090209.GG26718@alberich
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'arch/powerpc/sysdev/fsl_rmu.c')
0 files changed, 0 insertions, 0 deletions