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| author | Ryder Lee <ryder.lee@mediatek.com> | 2018-07-16 22:59:09 +0800 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2018-07-17 09:56:11 +0200 |
| commit | 2b519747ae4859e886c37834d766fe0c7d8d82e2 (patch) | |
| tree | 1bdd8414d34c720d4890abd77eb943770d714ed8 /arch/powerpc/crypto/aes-spe-regs.h | |
| parent | c0d9f9ad4f7691f033e6e476300edc1fc9e2688e (diff) | |
arm64: dts: mt7622: update a clock property for UART0
The input clock of UART0 should be CLK_PERI_UART0_PD.
Fixes: 13f36c326cef ("arm64: dts: mt7622: turn uart0 clock to real ones")
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'arch/powerpc/crypto/aes-spe-regs.h')
0 files changed, 0 insertions, 0 deletions