diff options
| author | Yonghong Song <ysong@broadcom.com> | 2014-04-29 20:07:53 +0530 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-05-30 16:50:38 +0200 |
| commit | 1c98398662c9b4e2f03f64344f83dd6cb14e0420 (patch) | |
| tree | b04a7f5b706430ac41cec627a6844944f7b58f57 /arch/mips/netlogic/common | |
| parent | edf3ed5e69bcf3f60087099eccab34be0ebcf60a (diff) | |
MIPS: Netlogic: Add support for XLP5XX
Add support for the XLP5XX processor which is an 8 core variant of the
XLP9XX. Add XLP5XX cases to code which earlier handled XLP9XX.
Signed-off-by: Yonghong Song <ysong@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6871/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/netlogic/common')
| -rw-r--r-- | arch/mips/netlogic/common/reset.S | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/netlogic/common/reset.S b/arch/mips/netlogic/common/reset.S index 5b60b469da15..701c4bcb9e47 100644 --- a/arch/mips/netlogic/common/reset.S +++ b/arch/mips/netlogic/common/reset.S @@ -177,6 +177,10 @@ FEXPORT(nlm_reset_entry) beq t0, t1, 2f /* does not need to set coherent */ nop + li t1, 0x1300 /* XLP 5xx */ + beq t0, t1, 2f /* does not need to set coherent */ + nop + /* set bit in SYS coherent register for the core */ mfc0 t0, CP0_EBASE, 1 mfc0 t1, CP0_EBASE, 1 |