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authorDavid S. Miller <davem@davemloft.net>2005-09-19 19:56:06 -0700
committerDavid S. Miller <davem@davemloft.net>2005-09-19 19:56:06 -0700
commitff171d8f66a7fe1a000e610e9de11224749f9a22 (patch)
tree5cd542d07cb547d80bbf71fbd0e26df25d0895ea /arch/m32r/mm/cache.c
parent875bd5ab01bc0b760fd4e97838931cd2e7456cbd (diff)
[SPARC64]: Handle little-endian unaligned loads/stores correctly.
Because we use byte loads/stores to cons up the value in and out of registers, we can't expect the ASI endianness setting to take care of this for us. So do it by hand. This case is triggered by drivers/block/aoe/aoecmd.c in the ataid_complete() function where it goes: /* word 100: number lba48 sectors */ ssize = le64_to_cpup((__le64 *) &id[100<<1]); This &id[100<<1] address is 4 byte, rather than 8 byte aligned, thus triggering the unaligned exception. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/m32r/mm/cache.c')
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