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authorXing Zheng <zhengxing@rock-chips.com>2017-01-10 14:15:29 +0800
committerHeiko Stuebner <heiko@sntech.de>2017-01-13 20:03:15 +0100
commit8cbb59af7ecf183b1761a178835e1c771167fa28 (patch)
tree49782dc0f29671950205df4577b5f5281979591f /arch/arm64/boot/dts
parent59cf70be5b7c6e3370f669976e3778104f4327ca (diff)
arm64: dts: rockchip: add rockchip,grf property for RK3399 PMUCRU/CRU
The structure rockchip_clk_provider needs to refer the GRF regmap in somewhere, if the CRU node has not "rockchip,grf" property, calling syscon_regmap_lookup_by_phandle will return an invalid GRF regmap, and the MUXGRF type clock will be not supported. Therefore, we need to add them. Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index a28b51ce4232..8e6d1bdeb9c3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1091,6 +1091,7 @@
pmucru: pmu-clock-controller@ff750000 {
compatible = "rockchip,rk3399-pmucru";
reg = <0x0 0xff750000 0x0 0x1000>;
+ rockchip,grf = <&pmugrf>;
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks = <&pmucru PLL_PPLL>;
@@ -1100,6 +1101,7 @@
cru: clock-controller@ff760000 {
compatible = "rockchip,rk3399-cru";
reg = <0x0 0xff760000 0x0 0x1000>;
+ rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks =