diff options
author | Arnd Bergmann <arnd@arndb.de> | 2017-02-09 16:14:14 +0100 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2017-02-09 16:14:14 +0100 |
commit | 0ca0d375822692d9dad64a693862c4e2e80aa20f (patch) | |
tree | 5e7020043335cf1e54f68d89dd728b4eca2aa84b /arch/arm64/boot/dts | |
parent | ca6f848694b0a81a73c03ec7ee8c5a99a886514f (diff) | |
parent | b8bcf0e1b21273584b6829bafe30f2949a062c34 (diff) |
Merge tag 'sunxi-dt64-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt64
Pull "Allwinner arm64 changes for 4.11" from Maxime Ripard:
Some patches related the arm64 Allwinner SoCs, most notably:
- Support for the MMC
- Suport for the USB and mUSB controllers
- New boards: Bananapi M64
* tag 'sunxi-dt64-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
arm64: allwinner: add BananaPi-M64 support
arm64: allwinner: a64: add UART1 pin nodes
arm64: allwinner: pine64: add MMC support
arm64: allwinner: a64: Increase the MMC max frequency
arm64: allwinner: a64: Add MMC pinctrl nodes
arm64: allwinner: a64: Add MMC nodes
arm64: dts: allwinner: Remove no longer used pinctrl/sun4i-a10.h header
arm64: dts: enable the MUSB controller of Pine64 in host-only mode
arm64: dts: add MUSB node to Allwinner A64 dtsi
arm64: dts: allwinner: enable EHCI1, OHCI1 and USB PHY nodes in Pine64
arm64: dts: allwinner: sort the nodes in sun50i-a64-pine64.dts
arm64: dts: allwinner: add USB1-related nodes of Allwinner A64
Diffstat (limited to 'arch/arm64/boot/dts')
-rw-r--r-- | arch/arm64/boot/dts/allwinner/Makefile | 1 | ||||
-rw-r--r-- | arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 120 | ||||
-rw-r--r-- | arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 43 | ||||
-rw-r--r-- | arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 137 |
4 files changed, 297 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile index 1e29a5ae8282..bc6f342be59f 100644 --- a/arch/arm64/boot/dts/allwinner/Makefile +++ b/arch/arm64/boot/dts/allwinner/Makefile @@ -1,3 +1,4 @@ +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-bananapi-m64.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb always := $(dtb-y) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts new file mode 100644 index 000000000000..6872135d7f84 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts @@ -0,0 +1,120 @@ +/* + * Copyright (c) 2016 ARM Ltd. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "sun50i-a64.dtsi" + +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "BananaPi-M64"; + compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64"; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + status = "okay"; +}; + +&i2c1_pins { + bias-pull-up; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + vmmc-supply = <®_vcc3v3>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; + cd-inverted; + disable-wp; + bus-width = <4>; + status = "okay"; +}; + +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + non-removable; + status = "okay"; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins>; + vmmc-supply = <®_vcc3v3>; + bus-width = <8>; + non-removable; + cap-mmc-hw-reset; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts index 47095909d9d6..c680ed385da3 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts @@ -44,6 +44,8 @@ #include "sun50i-a64.dtsi" +#include <dt-bindings/gpio/gpio.h> + / { model = "Pine64"; compatible = "pine64,pine64", "allwinner,sun50i-a64"; @@ -55,11 +57,16 @@ chosen { stdout-path = "serial0:115200n8"; }; + + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; }; -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_a>; +&ehci1 { status = "okay"; }; @@ -72,3 +79,33 @@ &i2c1_pins { bias-pull-up; }; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + vmmc-supply = <®_vcc3v3>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; + cd-inverted; + disable-wp; + bus-width = <4>; + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index e0dcab8eb035..1c64ea2d23f9 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -42,8 +42,9 @@ * OTHER DEALINGS IN THE SOFTWARE. */ +#include <dt-bindings/clock/sun50i-a64-ccu.h> #include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/pinctrl/sun4i-a10.h> +#include <dt-bindings/reset/sun50i-a64-ccu.h> / { interrupt-parent = <&gic>; @@ -120,6 +121,105 @@ #size-cells = <1>; ranges; + mmc0: mmc@1c0f000 { + compatible = "allwinner,sun50i-a64-mmc"; + reg = <0x01c0f000 0x1000>; + clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>; + clock-names = "ahb", "mmc"; + resets = <&ccu RST_BUS_MMC0>; + reset-names = "ahb"; + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; + max-frequency = <150000000>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + mmc1: mmc@1c10000 { + compatible = "allwinner,sun50i-a64-mmc"; + reg = <0x01c10000 0x1000>; + clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>; + clock-names = "ahb", "mmc"; + resets = <&ccu RST_BUS_MMC1>; + reset-names = "ahb"; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; + max-frequency = <150000000>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + mmc2: mmc@1c11000 { + compatible = "allwinner,sun50i-a64-emmc"; + reg = <0x01c11000 0x1000>; + clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>; + clock-names = "ahb", "mmc"; + resets = <&ccu RST_BUS_MMC2>; + reset-names = "ahb"; + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; + max-frequency = <200000000>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + usb_otg: usb@01c19000 { + compatible = "allwinner,sun8i-a33-musb"; + reg = <0x01c19000 0x0400>; + clocks = <&ccu CLK_BUS_OTG>; + resets = <&ccu RST_BUS_OTG>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + extcon = <&usbphy 0>; + status = "disabled"; + }; + + usbphy: phy@01c19400 { + compatible = "allwinner,sun50i-a64-usb-phy"; + reg = <0x01c19400 0x14>, + <0x01c1b800 0x4>; + reg-names = "phy_ctrl", + "pmu1"; + clocks = <&ccu CLK_USB_PHY0>, + <&ccu CLK_USB_PHY1>; + clock-names = "usb0_phy", + "usb1_phy"; + resets = <&ccu RST_USB_PHY0>, + <&ccu RST_USB_PHY1>; + reset-names = "usb0_reset", + "usb1_reset"; + status = "disabled"; + #phy-cells = <1>; + }; + + ehci1: usb@01c1b000 { + compatible = "allwinner,sun50i-a64-ehci", "generic-ehci"; + reg = <0x01c1b000 0x100>; + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_BUS_EHCI1>, + <&ccu CLK_USB_OHCI1>; + resets = <&ccu RST_BUS_OHCI1>, + <&ccu RST_BUS_EHCI1>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci1: usb@01c1b400 { + compatible = "allwinner,sun50i-a64-ohci", "generic-ohci"; + reg = <0x01c1b400 0x100>; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_USB_OHCI1>; + resets = <&ccu RST_BUS_OHCI1>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + ccu: clock@01c20000 { compatible = "allwinner,sun50i-a64-ccu"; reg = <0x01c20000 0x400>; @@ -146,10 +246,45 @@ function = "i2c1"; }; + mmc0_pins: mmc0-pins { + pins = "PF0", "PF1", "PF2", "PF3", + "PF4", "PF5"; + function = "mmc0"; + drive-strength = <30>; + bias-pull-up; + }; + + mmc1_pins: mmc1-pins { + pins = "PG0", "PG1", "PG2", "PG3", + "PG4", "PG5"; + function = "mmc1"; + drive-strength = <30>; + bias-pull-up; + }; + + mmc2_pins: mmc2-pins { + pins = "PC1", "PC5", "PC6", "PC8", "PC9", + "PC10","PC11", "PC12", "PC13", + "PC14", "PC15", "PC16"; + function = "mmc2"; + drive-strength = <30>; + bias-pull-up; + }; + uart0_pins_a: uart0@0 { pins = "PB8", "PB9"; function = "uart0"; }; + + uart1_pins: uart1_pins { + pins = "PG6", "PG7"; + function = "uart1"; + }; + + uart1_rts_cts_pins: uart1_rts_cts_pins { + pins = "PG8", "PG9"; + function = "uart1"; + }; }; uart0: serial@1c28000 { |