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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2017-02-19 22:41:46 +0100
committerKevin Hilman <khilman@baylibre.com>2017-03-06 09:55:54 -0800
commit695dcb2ba1363d06384b8e98c1adc46e79b36239 (patch)
tree317af90a392f4526aeabc0608303e16f48fed005 /arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
parentbe5f7befbd75ec95f0d444813ae85e26851eff3b (diff)
ARM64: dts: meson-gxbb-wetek-play2: add the ethernet PHY's reset GPIO
This resets the ethernet PHY during boot to get the PHY into a "clean" state. While here also specify the phy-handle of the ethmac node to make the PHY configuration similar to the one we have on GXL devices. This will allow us to specify OF-properties for the PHY itself. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts')
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
index ea79fdd2c248..ee86af928722 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
@@ -87,6 +87,30 @@
};
};
+&ethmac {
+ status = "okay";
+ pinctrl-0 = <&eth_rgmii_pins>;
+ pinctrl-names = "default";
+
+ phy-handle = <&eth_phy0>;
+ phy-mode = "rgmii";
+
+ snps,reset-gpio = <&gpio GPIOZ_14 0>;
+ snps,reset-delays-us = <0 10000 1000000>;
+ snps,reset-active-low;
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eth_phy0: ethernet-phy@0 {
+ /* Realtek RTL8211F (0x001cc916) */
+ reg = <0>;
+ };
+ };
+};
+
&i2c_A {
status = "okay";
pinctrl-0 = <&i2c_a_pins>;