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authorPrashant Gaikwad <pgaikwad@nvidia.com>2012-08-06 11:57:42 +0530
committerStephen Warren <swarren@nvidia.com>2012-09-06 11:47:20 -0600
commit96a1bd1e11ade7be969d275edd4c06749684cdba (patch)
treed76dde0eb30d5dab8cb81ad8d27fc5554e0cbe03 /arch/arm/mach-tegra/clock.h
parent23fc5b246119f665cfa075ce7567f31a017b11b8 (diff)
ARM: tegra: Add clk_tegra structure and helper functions
Add Tegra platform specific clock structure clk_tegra and some helper functions for generic clock framework. struct clk_tegra is the single strcture used for all types of clocks. reset and cfg_ex ops moved to clk_tegra from clk_ops. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/clock.h')
-rw-r--r--arch/arm/mach-tegra/clock.h90
1 files changed, 80 insertions, 10 deletions
diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h
index bc300657deba..f4d32ba56027 100644
--- a/arch/arm/mach-tegra/clock.h
+++ b/arch/arm/mach-tegra/clock.h
@@ -2,6 +2,7 @@
* arch/arm/mach-tegra/include/mach/clock.h
*
* Copyright (C) 2010 Google, Inc.
+ * Copyright (c) 2012 NVIDIA CORPORATION. All rights reserved.
*
* Author:
* Colin Cross <ccross@google.com>
@@ -20,6 +21,7 @@
#ifndef __MACH_TEGRA_CLOCK_H
#define __MACH_TEGRA_CLOCK_H
+#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/list.h>
#include <linux/spinlock.h>
@@ -54,6 +56,11 @@
struct clk;
+#ifdef CONFIG_COMMON_CLK
+struct clk_tegra;
+#define to_clk_tegra(_hw) container_of(_hw, struct clk_tegra, hw)
+#endif
+
struct clk_mux_sel {
struct clk *input;
u32 value;
@@ -68,6 +75,13 @@ struct clk_pll_freq_table {
u8 cpcon;
};
+enum clk_state {
+ UNINITIALIZED = 0,
+ ON,
+ OFF,
+};
+
+#ifndef CONFIG_COMMON_CLK
struct clk_ops {
void (*init)(struct clk *);
int (*enable)(struct clk *);
@@ -80,12 +94,6 @@ struct clk_ops {
enum tegra_clk_ex_param, u32);
};
-enum clk_state {
- UNINITIALIZED = 0,
- ON,
- OFF,
-};
-
struct clk {
/* node for master clocks list */
struct list_head node; /* node for list of all clocks */
@@ -147,6 +155,65 @@ struct clk {
spinlock_t spinlock;
};
+#else
+
+struct clk_tegra {
+ /* node for master clocks list */
+ struct list_head node; /* node for list of all clocks */
+ struct clk_lookup lookup;
+ struct clk_hw hw;
+
+ bool set;
+ unsigned long fixed_rate;
+ unsigned long max_rate;
+ unsigned long min_rate;
+ u32 flags;
+ const char *name;
+
+ enum clk_state state;
+ u32 div;
+ u32 mul;
+
+ u32 reg;
+ u32 reg_shift;
+
+ struct list_head shared_bus_list;
+
+ union {
+ struct {
+ unsigned int clk_num;
+ } periph;
+ struct {
+ unsigned long input_min;
+ unsigned long input_max;
+ unsigned long cf_min;
+ unsigned long cf_max;
+ unsigned long vco_min;
+ unsigned long vco_max;
+ const struct clk_pll_freq_table *freq_table;
+ int lock_delay;
+ unsigned long fixed_rate;
+ } pll;
+ struct {
+ u32 sel;
+ u32 reg_mask;
+ } mux;
+ struct {
+ struct clk *main;
+ struct clk *backup;
+ } cpu;
+ struct {
+ struct list_head node;
+ bool enabled;
+ unsigned long rate;
+ } shared_bus_user;
+ } u;
+
+ void (*reset)(struct clk_hw *, bool);
+ int (*clk_cfg_ex)(struct clk_hw *, enum tegra_clk_ex_param, u32);
+};
+#endif /* !CONFIG_COMMON_CLK */
+
struct clk_duplicate {
const char *name;
struct clk_lookup lookup;
@@ -159,13 +226,16 @@ struct tegra_clk_init_table {
bool enabled;
};
+#ifndef CONFIG_COMMON_CLK
+void clk_init(struct clk *clk);
+unsigned long clk_get_rate_locked(struct clk *c);
+int clk_set_rate_locked(struct clk *c, unsigned long rate);
+int clk_reparent(struct clk *c, struct clk *parent);
+#endif /* !CONFIG_COMMON_CLK */
+
void tegra2_init_clocks(void);
void tegra30_init_clocks(void);
-void clk_init(struct clk *clk);
struct clk *tegra_get_clock_by_name(const char *name);
-int clk_reparent(struct clk *c, struct clk *parent);
void tegra_clk_init_from_table(struct tegra_clk_init_table *table);
-unsigned long clk_get_rate_locked(struct clk *c);
-int clk_set_rate_locked(struct clk *c, unsigned long rate);
#endif